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[/] [raytrac/] [branches/] - Rev 250

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Rev Log message Author Age Path
250 Design changed..... doubts about OS using jguarin2002 4312d 01h /raytrac/branches
249 Using a register as a 66.5 MHZ timer counter jguarin2002 4314d 16h /raytrac/branches
248 Corrected an error on the normal jguarin2002 4322d 22h /raytrac/branches
247 Advance in application... but some normalization problems had popped up jguarin2002 4323d 14h /raytrac/branches
246 framework for conditional and accumulative operations DESCRIBED NOT IMPLEMENTED jguarin2002 4330d 02h /raytrac/branches
245 Avances pequenos en los documentos jguarin2002 4342d 21h /raytrac/branches
244 Changed the directory structure a little bit, there is now wide arith (which encapsulates in a single RTL 3 adders or 3 adders jguarin2002 4345d 19h /raytrac/branches
243 The Registers BASE+1, BASE+2, BASE+3 are used now for debugging purposes jguarin2002 4345d 19h /raytrac/branches
242 AS1 produced an unnoticed delay, the compiler geenerated an extra stage..... so a delay constant was added to sync this extra stage with the operation via ssync_chain jguarin2002 4345d 19h /raytrac/branches
241 fmul32 x 6 multipliers wide jguarin2002 4346d 15h /raytrac/branches
240 last minute correction jguarin2002 4346d 19h /raytrac/branches
239 wide multiplicator added to avoid optimization jguarin2002 4346d 20h /raytrac/branches
238 wide multiplicator added to avoid optimization jguarin2002 4346d 20h /raytrac/branches
237 corrected errors in raytrac.vhd jguarin2002 4346d 22h /raytrac/branches
236 Tunnning delay added to q0 queue jguarin2002 4347d 00h /raytrac/branches
235 Tunnning delay added to q0 queue jguarin2002 4347d 01h /raytrac/branches
234 raytrac update nothing major jguarin2002 4348d 00h /raytrac/branches
233 raytrac sopc component updated jguarin2002 4348d 00h /raytrac/branches
232 raytrac sopc component updated jguarin2002 4348d 01h /raytrac/branches
231 nfetch address counter implemented in a whole register for convinience jguarin2002 4348d 01h /raytrac/branches

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