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[/] [raytrac/] [branches/] [fp/] [fmul32.vhd] - Rev 153

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Rev Log message Author Age Path
153 last modifications for tb_compiler.py compliance jguarin2002 4479d 15h /raytrac/branches/fp/fmul32.vhd
152 Test bench oriented modifications jguarin2002 4483d 16h /raytrac/branches/fp/fmul32.vhd
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4556d 09h /raytrac/branches/fp/fmul32.vhd
139 Sync jguarin2002 4667d 00h /raytrac/branches/fp/fmul32.vhd
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4677d 16h /raytrac/branches/fp/fmul32.vhd
121 taking out std_logic_arith from sight.... no conversions allowed jguarin2002 4723d 04h /raytrac/branches/fp/fmul32.vhd
118 fp beta version reached a 17,5% logic cell starting at 450 LEs and finishing in 371 LEs for fadd32 jguarin2002 4729d 15h /raytrac/branches/fp/fmul32.vhd
96 2 floating points operands multiplication done and optimized jguarin2002 4767d 13h /fmul32.vhd
94 Optimization on the functionality of the mantissa multiplier... the results are much more precise than last revision... jguarin2002 4769d 10h /fmul32.vhd
93 New Fpbranch Directory Distribution jguarin2002 4769d 20h /fmul32.vhd
89 floating point mult ready jguarin2002 4772d 15h /fmul32.vhd
86 For the sake of easyness, mmp is called now mul2 jguarin2002 4774d 17h /fmul32.vhd
82 FPBRANCH releaseeeesvn add fpbranch/get.vhd fpbranch/sm.vhd fpbranch/slr.vhd fpbranch/mmp.vhd svn add fpbranch/get.vhd fpbranch/sm.vhd fpbranch/slr.vhd fpbranch/mmp.vhd svn add fpbranch/get.vhd fpbranch/sm.vhd fpbranch/slr.vhd fpbranch/mmp.vhd jguarin2002 4778d 04h /fmul32.vhd

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