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[/] [raytrac/] [branches/] [fp_sgdma/] [arith/] [memsqrt.mif] - Rev 238

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238 wide multiplicator added to avoid optimization jguarin2002 4307d 04h /raytrac/branches/fp_sgdma/arith/memsqrt.mif
196 raytrac+sg_dma+raytrac. Step One, the DPC is transformed. Now there are five instructions (check the design document), theres no full queue sync event, there are only four result queues and only 3 add fp 32 b adders rather than 4. Even it seems like a reduction has taken place, decodification efforts take place when decoding multiplexation from arithmetic blocks towards the resulting queues jguarin2002 4368d 01h /memsqrt.mif
118 fp beta version reached a 17,5% logic cell starting at 450 LEs and finishing in 371 LEs for fadd32 jguarin2002 4700d 01h /memsqrt.mif
99 Square Root... comin sun.... jguarin2002 4732d 20h /memsqrt.mif

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