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[/] [raytrac/] [trunk/] [arithpack.vhd] - Rev 43

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43 Nothing to say, just working on the Test Bench... jguarin2002 4875d 12h /raytrac/trunk/arithpack.vhd
42 no comment no tb yet: jguarin2002 4876d 06h /raytrac/trunk/arithpack.vhd
40 test bench changes..... jguarin2002 4878d 17h /raytrac/trunk/arithpack.vhd
32 carry_logic parameter added to uf entity jguarin2002 4888d 19h /raytrac/trunk/arithpack.vhd
27 Optimized code, using IEEE libraries and extra parameters to make a more legible code jguarin2002 4903d 02h /raytrac/trunk/arithpack.vhd
26 Corrections on opcoder jguarin2002 4903d 06h /raytrac/trunk/arithpack.vhd
25 Support to variable width and the possibility to choose between behavioral description and structural description jguarin2002 4903d 06h /raytrac/trunk/arithpack.vhd
24 Added a more simple mux to opcoder implementation. jguarin2002 4909d 23h /raytrac/trunk/arithpack.vhd
23 Doxygen documentation related changes..... jguarin2002 4910d 00h /raytrac/trunk/arithpack.vhd
22 Doxygen Documentation related changes. jguarin2002 4910d 15h /raytrac/trunk/arithpack.vhd
16 Commiting differences related to Doxygen documentation adding jguarin2002 4915d 04h /raytrac/trunk/arithpack.vhd
15 When selecting s0name, s1name, for a signal that belongs to a 2 stage pipe, the compiler would, based on the name, create just a single flipflop with Q feedbacking D, and that's no the case, so a lot of names has been changed, from s0signalname, s1signalname to stage0signalname, s1signalname and so on... jguarin2002 4917d 17h /raytrac/trunk/arithpack.vhd
14 Lots of typos fixed...... jguarin2002 4919d 16h /raytrac/trunk/arithpack.vhd
13 syntax typo fixed... jguarin2002 4919d 18h /raytrac/trunk/arithpack.vhd
12 syntax typo fixed... jguarin2002 4919d 18h /raytrac/trunk/arithpack.vhd
10 arithpack component declaration changed to make a more 'understandable' design, perhaps wont be that legible but at this stage, at least to me it is jguarin2002 4925d 09h /raytrac/trunk/arithpack.vhd
9 dumped fastmux, did not need it at all (by now), therefore arithpack.vhd was modified, by deleting the fastmux component declaration jguarin2002 4925d 12h /raytrac/trunk/arithpack.vhd
8 uf.vhd now is complete, got to assemble the whole uf.vhd and opcoder and the raytracing engine will be completed jguarin2002 4925d 17h /raytrac/trunk/arithpack.vhd
2 In next check in i will comment in a richer and significant way, for now Im on planning Stage ..... jguarin2002 4931d 04h /raytrac/trunk/arithpack.vhd

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