Rev |
Log message |
Author |
Age |
Path |
44 |
All components in the test bench are now instantiated what is left now is the magic, menaing the test algorithm... also rom memories with crash test dummies are addedsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mifsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mif... |
jguarin2002 |
4862d 15h |
/raytrac/trunk/arithpack.vhd |
43 |
Nothing to say, just working on the Test Bench... |
jguarin2002 |
4862d 23h |
/raytrac/trunk/arithpack.vhd |
42 |
no comment no tb yet: |
jguarin2002 |
4863d 16h |
/raytrac/trunk/arithpack.vhd |
40 |
test bench changes..... |
jguarin2002 |
4866d 04h |
/raytrac/trunk/arithpack.vhd |
32 |
carry_logic parameter added to uf entity |
jguarin2002 |
4876d 06h |
/raytrac/trunk/arithpack.vhd |
27 |
Optimized code, using IEEE libraries and extra parameters to make a more legible code |
jguarin2002 |
4890d 13h |
/raytrac/trunk/arithpack.vhd |
26 |
Corrections on opcoder |
jguarin2002 |
4890d 17h |
/raytrac/trunk/arithpack.vhd |
25 |
Support to variable width and the possibility to choose between behavioral description and structural description |
jguarin2002 |
4890d 17h |
/raytrac/trunk/arithpack.vhd |
24 |
Added a more simple mux to opcoder implementation. |
jguarin2002 |
4897d 10h |
/raytrac/trunk/arithpack.vhd |
23 |
Doxygen documentation related changes..... |
jguarin2002 |
4897d 10h |
/raytrac/trunk/arithpack.vhd |
22 |
Doxygen Documentation related changes. |
jguarin2002 |
4898d 01h |
/raytrac/trunk/arithpack.vhd |
16 |
Commiting differences related to Doxygen documentation adding |
jguarin2002 |
4902d 15h |
/raytrac/trunk/arithpack.vhd |
15 |
When selecting s0name, s1name, for a signal that belongs to a 2 stage pipe, the compiler would, based on the name, create just a single flipflop with Q feedbacking D, and that's no the case, so a lot of names has been changed, from s0signalname, s1signalname to stage0signalname, s1signalname and so on... |
jguarin2002 |
4905d 03h |
/raytrac/trunk/arithpack.vhd |
14 |
Lots of typos fixed...... |
jguarin2002 |
4907d 03h |
/raytrac/trunk/arithpack.vhd |
13 |
syntax typo fixed... |
jguarin2002 |
4907d 04h |
/raytrac/trunk/arithpack.vhd |
12 |
syntax typo fixed... |
jguarin2002 |
4907d 05h |
/raytrac/trunk/arithpack.vhd |
10 |
arithpack component declaration changed to make a more 'understandable' design, perhaps wont be that legible but at this stage, at least to me it is |
jguarin2002 |
4912d 20h |
/raytrac/trunk/arithpack.vhd |
9 |
dumped fastmux, did not need it at all (by now), therefore arithpack.vhd was modified, by deleting the fastmux component declaration |
jguarin2002 |
4912d 22h |
/raytrac/trunk/arithpack.vhd |
8 |
uf.vhd now is complete, got to assemble the whole uf.vhd and opcoder and the raytracing engine will be completed |
jguarin2002 |
4913d 03h |
/raytrac/trunk/arithpack.vhd |
2 |
In next check in i will comment in a richer and significant way, for now Im on planning Stage ..... |
jguarin2002 |
4918d 15h |
/raytrac/trunk/arithpack.vhd |