URL https://opencores.org/ocsvn/rio/rio/trunk

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[/] [rio] - Rev 23

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Rev	Log message	Author	Age	Path
23	Tagging alpha release 2.0.0.	magro732	3914d 04h	/rio
22	Tagging release 1.0.0.	magro732	3914d 04h	/rio
21	Branching of a single symbol version of the new RioSerial.	magro732	3914d 04h	/rio
20	Adding software C-stack and matching VHDL modules.	magro732	3979d 07h	/rio
19	Removing synthesis warnings.	magro732	4004d 06h	/rio
18	Making RioSerial entity the same as before+minor fixes.	magro732	4005d 05h	/rio
17	Removing latch and improving timing.	magro732	4006d 05h	/rio
16	Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing.	magro732	4006d 06h	/rio
15	All testcases are ok. Still needs some tweeks though.	magro732	4010d 07h	/rio
14	Most issues solved, testbench issues remains.	magro732	4013d 06h	/rio
13	Timeouts are working.	magro732	4016d 07h	/rio
12	Backup of recent work, debugging new RioSerial.	magro732	4027d 05h	/rio
11	Receiver ready, transmitter is compiling.	magro732	4027d 06h	/rio
10	Branch to develop support for parallel symbols.	magro732	4027d 06h	/rio
9	Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes)	azdem	4068d 18h	/rio
8	Adding signal descriptions in comments.	magro732	4112d 07h	/rio
7	Adding missing generic parameters to RioPacketBuffer.	magro732	4199d 11h	/rio
6	Adding RioWbBridge. Sorry, no testbench for this one.	magro732	4199d 13h	/rio
5	Uploading primitive documentation.	magro732	4206d 05h	/rio
4	Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification.	magro732	4228d 18h	/rio

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Subversion Repositories rio

[/] [rio] - Rev 23

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