URL https://opencores.org/ocsvn/rise/rise/trunk

Subversion Repositories rise

[/] [rise/] [trunk/] [vhdl/] [register_file.vhd] - Rev 56

Rev	Log message	Author	Age	Path
56	new sensitivity list	ustadler	6483d 08h	/rise/trunk/vhdl/register_file.vhd
49	data can be ead asynchronous, data is written with the rising edge of the clk	ustadler	6483d 10h	/rise/trunk/vhdl/register_file.vhd
44	- Added another version of a register file which is a bit simplier.	cwalter	6484d 06h	/rise/trunk/vhdl/register_file.vhd
26	Applied VHDL indent.	jlechner	6486d 03h	/rise/trunk/vhdl/register_file.vhd
21	überarbeitet. asynchrones lesen und synchrones schreiben. dreg_enable, sr_enable und lr_enable zur entity hinzugefügt	ustadler	6488d 04h	/rise/trunk/vhdl/register_file.vhd
19	Version 1.2 der register file	ustadler	6488d 13h	/rise/trunk/vhdl/register_file.vhd
2	Initial commit of project	jlechner	6521d 07h	/rise/trunk/vhdl/register_file.vhd