OpenCores
URL https://opencores.org/ocsvn/rs232_interface/rs232_interface/trunk

Subversion Repositories rs232_interface

[/] [rs232_interface] - Rev 18

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
18 Added RX state verification for start bit process.
Added loop in the parallel interface of TB.		 akram.mashni 4344d 18h /rs232_interface
17 First commit of uart test bench.
WARNING: Not yet finished! Commited for back up.		 akram.mashni 4777d 01h /rs232_interface
16 Project's block diagram.
It will be use in the datasheet.
(Compression level 5 when export from .odg file).		 akram.mashni 4878d 10h /rs232_interface
15 Removed uncompressed image with big size. akram.mashni 4878d 11h /rs232_interface
14 Block diagram image of 2011-01-16 version.
It will be use in the datasheet.
(Compression level 5 when export from .odg file).		 akram.mashni 4878d 11h /rs232_interface
13 Initial commit of documentation.
Created block diagram (OpenOffice Draw format).		 akram.mashni 4878d 11h /rs232_interface
12 Updated news of uart.vhd commit. akram.mashni 4879d 14h /rs232_interface
11 Moved debouncer to a new process.
Fixed rx_clk_en generation.
Fixed start of reception condition on rx FSM.		 akram.mashni 4879d 14h /rs232_interface
10 Implemented asynchronous mode and RX clock regeneration.
NOT TESTED !!!		 akram.mashni 4887d 08h /rs232_interface
9 Updated change log. akram.mashni 4924d 23h /rs232_interface
8 Added Recommended Tools akram.mashni 4924d 23h /rs232_interface
7 Implemented PARITY (not tested!). akram.mashni 4926d 10h /rs232_interface
6 Fixed/improved header.
Changed SPACEs to TABs.		 akram.mashni 4927d 15h /rs232_interface
5 Added comments to port map. akram.mashni 4934d 19h /rs232_interface
4 Added "Change Log".
Added "About"		 akram.mashni 4934d 20h /rs232_interface
3 Added main file.
Fisrt commit.
Tested in the following conditions:
- Baud rate: 9600 bps.
- Implementation: Xilinx Spartan3e500 (Nexys2 Kit - Digilent)
- Main clock 50 MHz		 akram.mashni 4934d 20h /rs232_interface
2 Initial Commit luciorp 4991d 09h /rs232_interface
1 The project and the structure was created root 5019d 06h /rs232_interface

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.