URL https://opencores.org/ocsvn/rtf65002/rtf65002/trunk

Subversion Repositories rtf65002

[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [load_mac.v] - Rev 25

Rev	Log message	Author	Age	Path
23	- added subtract immediate from sp - added stack relative addressing mode - added move positive, move negative instructions - fix: TSA instruction	robfinch	4076d 19h	/rtf65002/trunk/rtl/verilog/load_mac.v
22	- fix indirect load	robfinch	4078d 09h	/rtf65002/trunk/rtl/verilog/load_mac.v
21	- config processor mode on reset - D flag flags extended precision for add/sub - added software interrupt call facility - unimplmented opcode vectoring - bus error signal support - merge load states to reduce core size - zero out ir during interrupt	robfinch	4078d 14h	/rtf65002/trunk/rtl/verilog/load_mac.v