URL https://opencores.org/ocsvn/rtf65002/rtf65002/trunk

Subversion Repositories rtf65002

[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [mult_div.v] - Rev 35

Rev	Log message	Author	Age	Path
35	- several bug fixes - mul,mod,div immediates mode than 8 bits - page two opcode fix on cache miss - setting upper pc bits in emulation mode (store)	robfinch	3892d 03h	/rtf65002/trunk/rtl/verilog/mult_div.v
32	- many changes - new instructions - code reorganization	robfinch	3902d 17h	/rtf65002/trunk/rtl/verilog/mult_div.v
30	- added additional branches - modified the pc increment - modified interrupts, all vector through BRK - registered some decodes - added SUPPORT macros to allow core trimming	robfinch	3912d 15h	/rtf65002/trunk/rtl/verilog/mult_div.v
12	- added LFSR and TICK count special registers - added MUL/DIV/MOD instructions	robfinch	3931d 15h	/rtf65002/trunk/rtl/verilog/mult_div.v