URL https://opencores.org/ocsvn/rtf65002/rtf65002/trunk

Subversion Repositories rtf65002

[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [rtf65002_defines.v] - Rev 35

Rev	Log message	Author	Age	Path
35	- several bug fixes - mul,mod,div immediates mode than 8 bits - page two opcode fix on cache miss - setting upper pc bits in emulation mode (store)	robfinch	4044d 15h	/rtf65002/trunk/rtl/verilog/rtf65002_defines.v
32	- many changes - new instructions - code reorganization	robfinch	4055d 04h	/rtf65002/trunk/rtl/verilog/rtf65002_defines.v
30	- added additional branches - modified the pc increment - modified interrupts, all vector through BRK - registered some decodes - added SUPPORT macros to allow core trimming	robfinch	4065d 02h	/rtf65002/trunk/rtl/verilog/rtf65002_defines.v