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[/] [s1_core/] [trunk] - Rev 84

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Rev	Log message	Author	Age	Path
84	Again, used module names instead than instance names in bottom-up synthesis approach.	fafa1971	6095d 02h	/s1_core/trunk
83	Decreased clock frequency from 250 to 200 MHz.	fafa1971	6101d 22h	/s1_core/trunk
82	DC synthesis script modified according to the fabolous manual (RTFM...).	fafa1971	6112d 22h	/s1_core/trunk
81	Sorry, I made a mistake in the waveform of the clock!	fafa1971	6113d 01h	/s1_core/trunk
80	Hyerarchical report_area.	fafa1971	6115d 21h	/s1_core/trunk
79	Relaxed timing, added flatten and hyerarchical report_area.	fafa1971	6115d 21h	/s1_core/trunk
78	Relaxed timing and added flatten command.	fafa1971	6115d 21h	/s1_core/trunk
77	Now includes comments (in Italian!)	fafa1971	6200d 19h	/s1_core/trunk
76	Changed again from DB export to DDC export	fafa1971	6215d 18h	/s1_core/trunk
75	Changed preprocessing for DC synthesis	fafa1971	6215d 22h	/s1_core/trunk
74	Updated filelists.	fafa1971	6215d 22h	/s1_core/trunk
73	New version of scripts for DC and to compile boot code	fafa1971	6215d 23h	/s1_core/trunk
72	Modified RAM address from 0x400C0 to 0x4C000	fafa1971	6222d 06h	/s1_core/trunk
71	Added check for S1_ROOT set (suggested by lain.ux)	fafa1971	6223d 06h	/s1_core/trunk
70	Again, the setup file is linked rather than copied	fafa1971	6230d 15h	/s1_core/trunk
69	Now contains also the other file	fafa1971	6230d 15h	/s1_core/trunk
68	Merged with the DC setup file	fafa1971	6230d 15h	/s1_core/trunk
67	Now uses XG/Tcl syntax	fafa1971	6232d 15h	/s1_core/trunk
66	Modified to use XG syntax	fafa1971	6232d 15h	/s1_core/trunk
65	Version with undisclosed library names	fafa1971	6232d 15h	/s1_core/trunk

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[/] [s1_core/] [trunk] - Rev 84

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