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[/] [s6soc/] [trunk/] [rtl/] [cpu] - Rev 46

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Rev Log message Author Age Path
46 Added missing files from the 8b branch, deleted unneeded files dgisselq 2648d 20h /s6soc/trunk/rtl/cpu
42 Adjusted the timer to support both auto-reloading and non-auto-reloading
functionality--in order to save space. Hence the watch-dog timer, which doesn't
need any reloading functionality, doesn't get it (anymore).		 dgisselq 2938d 17h /s6soc/trunk/rtl/cpu
30 Brings the CPU up to date with the rest of the ZipCPU distribution. dgisselq 2947d 09h /s6soc/trunk/rtl/cpu
24 Made the ziptimer autoreload feature a parameter (dis)abled option. dgisselq 2951d 21h /s6soc/trunk/rtl/cpu
23 Fixed a bug which caused every instruction to be loaded/prefetched twice. dgisselq 2951d 21h /s6soc/trunk/rtl/cpu
16 Bug fix. This release fixes several bugs associated with transitioning from
user mode to supervisor mode while running from flash memory. This also
rewires TIMER-B into a watch-dog timer, and adjusts the LED's to be an
indicator of interrupts and whether or not the CPU has stalled or not as well.		 dgisselq 2955d 20h /s6soc/trunk/rtl/cpu
11 Runs on hardware now! Added proper pinouts, pipelined wishbone command
interface sufficient for loading the flash, a loader to load the flash,
and verified that they work.		 dgisselq 2963d 09h /s6soc/trunk/rtl/cpu
8 First pseudo-running version. The alternate configuration (not the main one)
has been initially tested. wbregs works for reading/writing registers,
so it is now possible to test the peripherals.		 dgisselq 2968d 09h /s6soc/trunk/rtl/cpu
7 Created/added an initial specification. Updated/corrected several copywrite
notices.		 dgisselq 2969d 00h /s6soc/trunk/rtl/cpu
4 Lots of updates, as part of actually making this work on hardware. Not there
yet, so this is still pre-alpha.		 dgisselq 2989d 19h /s6soc/trunk/rtl/cpu
2 The initial check in--all the files that will make this SoC work. dgisselq 3000d 14h /s6soc/trunk/rtl/cpu

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