URL https://opencores.org/ocsvn/sata_controller_core/sata_controller_core/trunk

Subversion Repositories sata_controller_core

[/] [sata_controller_core/] [trunk] - Rev 17

Rev	Log message	Author	Age	Path
17	Updated variable type of 'size' field in 'sata_dev' struct from int to unsigned long long.	bhuang2	4205d 06h	/sata_controller_core/trunk
16	Changed SATA_MINOR from 2 to 16.	bhuang2	4207d 14h	/sata_controller_core/trunk
15	Updated the configuration file for correct control register mapping. Bin	bhuang2	4212d 15h	/sata_controller_core/trunk
14	Initial upload of block device driver for SATA core. To-do: Write a README file about how to build this device driver, testing methodology, etc. Bin Huang	bhuang2	4391d 07h	/sata_controller_core/trunk
13	bug fix	ashwin_mendon	4506d 13h	/sata_controller_core/trunk
12		ashwin_mendon	4518d 08h	/sata_controller_core/trunk
11	added base_system	ashwin_mendon	4532d 17h	/sata_controller_core/trunk
10		ashwin_mendon	4535d 15h	/sata_controller_core/trunk
9		ashwin_mendon	4547d 10h	/sata_controller_core/trunk
8		ashwin_mendon	4547d 10h	/sata_controller_core/trunk
7	corrected	ashwin_mendon	4548d 14h	/sata_controller_core/trunk
6	placeholders for PLB and driver directories	rsass	4581d 17h	/sata_controller_core/trunk
5	put sata core with locallink interface in sata2_fifo dir	rsass	4581d 17h	/sata_controller_core/trunk
4	Starting to reorganize for additional cores/source	rsass	4581d 17h	/sata_controller_core/trunk
3	cleaned code	ashwin_mendon	4588d 07h	/sata_controller_core/trunk
2	Added Source Files	ashwin_mendon	4595d 09h	/sata_controller_core/trunk
1	The project and the structure was created	root	4631d 16h	/sata_controller_core/trunk