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[/] [sdram_controller/] [trunk/] [sdram.vhd] - Rev 18

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18 Forgot to update the comments lynn0p 5358d 14h /sdram_controller/trunk/sdram.vhd
17 When I moved the z80 callstack pointer into SDRAM from onchip SRAM,
very hilarious things started to happen. This removes the hilarity and
restores the previous somber mood. Depending on your own design you
may or may not want to update to this revision		 lynn0p 5358d 14h /sdram_controller/trunk/sdram.vhd
16 Removed a redundant cap_en lynn0p 5360d 19h /sdram_controller/trunk/sdram.vhd
12 1. rolled write recover clocks back to previous value and edited comments
2. increased 200us wait time to 300us in the init module		 lynn0p 5370d 20h /sdram_controller/trunk/sdram.vhd
11 consolidated capture into one process and added comments lynn0p 5371d 16h /sdram_controller/trunk/sdram.vhd
10 Fixes to more glitches uncovered during testing with my T80 SoC. Some
ops were getting dropped on the floor when the controller needed to do
an auto refresh.		 lynn0p 5371d 20h /sdram_controller/trunk/sdram.vhd
9 Got rid of some redundant busy_n <= '0' statements lynn0p 5373d 08h /sdram_controller/trunk/sdram.vhd
8 Changes made to integrate and test with my homebrew SoC design.

1. One DCM has been removed. Now requires a 100mhz clock fed in. Only
consumes one DCM, if you can find a 100mhz clock somewhere.
2. Small timing modifications to fix memory glitches between controller
and the t80 soft cpu I'm using.		 lynn0p 5373d 08h /sdram_controller/trunk/sdram.vhd
7 Reformatted the comments so they fit in 80 columns lynn0p 5381d 13h /sdram_controller/trunk/sdram.vhd
6 changes to reduce synthesizer warnings, removed unused signals, etc. lynn0p 5381d 17h /sdram_controller/trunk/sdram.vhd
2 initial checkin lynn0p 5382d 14h /sdram_controller/trunk/sdram.vhd

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