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[/] [socgen/] [trunk/] [common/] [opencores.org/] [Testbench/] [bfms/] [micro_bus16_model/] [rtl/] [verilog/] [top.syn] - Rev 134

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Rev Log message Author Age Path
134 Resynced database
socgen now supports elaboration
Bad news is that it is now alot slower.
jt_eaton 3455d 07h /socgen/trunk/common/opencores.org/Testbench/bfms/micro_bus16_model/rtl/verilog/top.syn
131 Added elaboration databases and tools
Added bus map creation tools
jt_eaton 3530d 05h /socgen/trunk/common/opencores.org/Testbench/bfms/micro_bus16_model/rtl/verilog/top.syn

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