URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen] - Rev 130

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Rev	Log message	Author	Age	Path
130	Dec 2014 major release trimmed out some IP replaced perl database with Berkeley	jt_eaton	3497d 03h	/socgen
129	removed unneeded 6502 files	jt_eaton	3952d 09h	/socgen
128	major cleanup added toolflows for sim,syn,documentation,linting and verilog added documentation tools	jt_eaton	3952d 09h	/socgen
127	final cleanup before DAC	jt_eaton	4067d 05h	/socgen
126	added mor1kx cleanup	jt_eaton	4120d 10h	/socgen
125	Added two new 6502 cores in www.6502.org cleaned up sogen xml files and added module name control	jt_eaton	4165d 04h	/socgen
124	beta release candidate 1 changed design.xml name aligned schema with filesystem	jt_eaton	4218d 07h	/socgen
123	added support for ubuntu 12.10	jt_eaton	4232d 23h	/socgen
122	Moved Nexys2 from opencores.org to digilentinc.com Moved jtag_rpc and or1k Busdefs into cde_jtag and or1200 components	jt_eaton	4241d 02h	/socgen
121	cleaned up sims, added autogenerated test bench files removed mrisc and experimental or1k code	jt_eaton	4261d 08h	/socgen
120	clean up componentGenerators names and directories sim + lint now synthesis TestBench	jt_eaton	4279d 08h	/socgen
119	moved copyright files into /verilog changed cde copyright to apache from gplv3 split out tools into separate subdirectories changed design.xml files to socgen: namespace	jt_eaton	4314d 03h	/socgen
118	optimized gen_verilog added padring support added configuration support added jtag sims added accellera candidate bus defs	jt_eaton	4349d 12h	/socgen
117	added yellow pages tools	jt_eaton	4377d 07h	/socgen
116	added build_header now use build_register for all spr components resynced or1200 code back to use orbuild toolchain	jt_eaton	4412d 04h	/socgen
115	split or1200_cpu up into all ip-xact components removed dead files	jt_eaton	4456d 08h	/socgen
114	moved or1200 connectivity out of verilog and into ip-xact added or1200_boot block removed force of 00 on lowest iwb_addr bits	jt_eaton	4468d 08h	/socgen
113	started refactoring or1200	jt_eaton	4474d 00h	/socgen
112	added more test sims removed unneeded files	jt_eaton	4483d 13h	/socgen
111	split or1200 out into seperate test suite	jt_eaton	4485d 07h	/socgen

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Subversion Repositories socgen

[/] [socgen] - Rev 130

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