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[/] [t48/] [tags/] [rel_0_4_beta/] [rtl/] [vhdl/] [decoder.vhd] - Rev 120

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Rev Log message Author Age Path
120 Fix bug report:
"Program Memory bank can be switched during interrupt"
int module emits int_in_progress signal that is used inside the decoder
to hold mb low for JMP and CALL during interrupts		 arniml 7379d 18h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
106 clean-up use of ea_i arniml 7420d 17h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
101 assert p2_read_p2_o when expander port is read arniml 7424d 00h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
92 work around bug in Quartus II 4.0 arniml 7425d 00h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
78 adjust external timing of BUS arniml 7445d 23h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
72 removed superfluous signal from sensitivity list arniml 7447d 04h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
64 + enhance instruction strobe generation
+ rework address output under EA=1 conditions		 arniml 7452d 20h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
60 + add marker for injected calls
+ suppress intstruction strobes for injected calls		 arniml 7455d 17h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
53 make istrobe visible through testbench package arniml 7456d 18h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
45 remove unused signals arniml 7463d 17h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
38 add measures to implement XCHD arniml 7467d 01h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
27 implemented mnemonic DA arniml 7473d 18h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
21 implement mnemonics:
+ MOVD_A_PP
+ OUTD_PP_A -> ANLD PP, A; MOVD PP, A; ORLD PP, A		 arniml 7474d 02h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd
4 initial check-in arniml 7478d 18h /t48/tags/rel_0_4_beta/rtl/vhdl/decoder.vhd

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