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[/] [t48/] [tags/] [rel_0_6_beta] - Rev 175

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Rev Log message Author Age Path
175 add bug report
"MSB of Program Counter changed upon PC increment"		 arniml 6997d 12h /t48/tags/rel_0_6_beta
174 fix bug report
"MSB of Program Counter changed upon PC increment"		 arniml 6997d 12h /t48/tags/rel_0_6_beta
173 testcase for bug report
"MSB of Program Counter changed upon PC increment"		 arniml 6997d 12h /t48/tags/rel_0_6_beta
172 save data from wishbone bus in register bank with wb_ack
necessary to hold data from peripheral/memory until it is read by T48		 arniml 7026d 09h /t48/tags/rel_0_6_beta
171 remove obsolete output stack_high_o arniml 7027d 09h /t48/tags/rel_0_6_beta
170 intermediate update arniml 7028d 15h /t48/tags/rel_0_6_beta
169 initial check-in arniml 7028d 21h /t48/tags/rel_0_6_beta
168 change address range of wb_master arniml 7028d 21h /t48/tags/rel_0_6_beta
167 simplify address range:
- configuration range
- Wishbone range		 arniml 7028d 21h /t48/tags/rel_0_6_beta
166 assign default for state_s arniml 7030d 12h /t48/tags/rel_0_6_beta
165 add component wb_master.vhd arniml 7031d 11h /t48/tags/rel_0_6_beta
164 initial check-in arniml 7031d 11h /t48/tags/rel_0_6_beta
163 add bug
Wrong clock applied to T0		 arniml 7032d 11h /t48/tags/rel_0_6_beta
162 Fix bug report:
"Wrong clock applied to T0"
t0_o is generated inside clock_ctrl with a separate flip-flop running
with xtal_i		 arniml 7032d 11h /t48/tags/rel_0_6_beta
161 fix syntax problem that triggers an error with GHDL 0.18 arniml 7063d 15h /t48/tags/rel_0_6_beta
160 add others to case statement arniml 7184d 11h /t48/tags/rel_0_6_beta
159 fix dependencies for tb_t8048_behav_c0 and tb_t8039_behav_c0 arniml 7184d 11h /t48/tags/rel_0_6_beta
158 added hierarchies t8039_notri and t8048_notri arniml 7184d 11h /t48/tags/rel_0_6_beta
157 removed obsolete constant arniml 7184d 11h /t48/tags/rel_0_6_beta
156 added hierarchy t8039_notri arniml 7184d 12h /t48/tags/rel_0_6_beta

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