URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] [rtl/] [vhdl/] [p2.vhd] - Rev 292

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5601d 04h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd
277	This commit was manufactured by cvs2svn to create tag 'rel_1_0'.		6413d 14h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd
220	new input xtal_en_i	arniml	6595d 13h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd
206	* change low impedance markers for P2 separate marker for low and high part * p2_o output is also registered to prevent combinational output to pads	arniml	6825d 17h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd
179	introduce prefix 't48_' for all packages, entities and configurations	arniml	6969d 04h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd
129	cleanup copyright notice	arniml	7303d 21h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd
98	Fix bug "ANL and ORL to P1/P2 read port status instead of port output register"	arniml	7359d 00h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd
77	move from std_logic_arith to numeric_std	arniml	7381d 14h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd
32	rename pX_limp to pX_low_imp	arniml	7407d 18h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd
23	rework Port 2 expander handling	arniml	7409d 01h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd
4	initial check-in	arniml	7413d 17h	/t48/tags/rel_1_0/rtl/vhdl/p2.vhd