OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] [rtl/] [vhdl/] [timer.vhd] - Rev 128

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
128 counter_q is not cleared during reset
this would match all different descriptions of the Counter as
a) if the software assumes that the Counter is modified during reset, it
will initialize the Counter anyhow
b) the special case 'Counter not modified during reset' is covered
arniml 7336d 18h /t48/tags/rel_1_0/rtl/vhdl/timer.vhd
91 fix edge detector bug for counter arniml 7385d 16h /t48/tags/rel_1_0/rtl/vhdl/timer.vhd
59 increment prescaler with MSTATE4 arniml 7416d 09h /t48/tags/rel_1_0/rtl/vhdl/timer.vhd
4 initial check-in arniml 7439d 10h /t48/tags/rel_1_0/rtl/vhdl/timer.vhd

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.