OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0] - Rev 235

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
235 cleanup dependencies arniml 6599d 03h /t48/tags/rel_1_0
234 cleanup & enhance external access arniml 6599d 03h /t48/tags/rel_1_0
233 added external ROM arniml 6599d 03h /t48/tags/rel_1_0
232 update to new memory concept arniml 6600d 02h /t48/tags/rel_1_0
231 obsoleted by new memory concept arniml 6600d 02h /t48/tags/rel_1_0
230 simplify shell command execution arniml 6600d 02h /t48/tags/rel_1_0
229 rework hex/simulation targets arniml 6600d 02h /t48/tags/rel_1_0
228 replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom/t3x_rom arniml 6600d 02h /t48/tags/rel_1_0
227 replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom arniml 6600d 02h /t48/tags/rel_1_0
226 replaced syn_ram with generic_ram_ena arniml 6600d 02h /t48/tags/rel_1_0
225 replaced syn_rom and syn_ram with t48_rom and generic_ram_ena arniml 6600d 02h /t48/tags/rel_1_0
224 initial check-in arniml 6600d 02h /t48/tags/rel_1_0
223 obsoleted arniml 6600d 02h /t48/tags/rel_1_0
222 add note about clock enable for data memory RAM macro arniml 6601d 02h /t48/tags/rel_1_0
221 new input xtal_en_i arniml 6601d 02h /t48/tags/rel_1_0
220 new input xtal_en_i arniml 6601d 02h /t48/tags/rel_1_0
219 new input xtal_en_i gates xtal_i base clock arniml 6601d 02h /t48/tags/rel_1_0
218 simplifications arniml 6687d 10h /t48/tags/rel_1_0
217 update for release 0.6.1 beta arniml 6756d 06h /t48/tags/rel_1_0
216 assign clk_i to outclock arniml 6818d 06h /t48/tags/rel_1_0

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.