URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_1/] [sw] - Rev 266

Rev	Log message	Author	Age	Path
266	cell contains io expander tests	arniml	6601d 02h	/t48/tags/rel_1_1/sw
265	tagging changed for io expander simulation	arniml	6601d 02h	/t48/tags/rel_1_1/sw
264	initial check-in	arniml	6601d 02h	/t48/tags/rel_1_1/sw
246	initial check-in	arniml	6606d 02h	/t48/tags/rel_1_1/sw
245	initial check-in	arniml	6606d 02h	/t48/tags/rel_1_1/sw
241	include t8048 and t8039 testbenches	arniml	6624d 00h	/t48/tags/rel_1_1/sw
239	adapt t48 external ROM offset	arniml	6624d 00h	/t48/tags/rel_1_1/sw
238	initial check-in	arniml	6624d 01h	/t48/tags/rel_1_1/sw
237	initial check-in	arniml	6624d 01h	/t48/tags/rel_1_1/sw
236	initial check-in	arniml	6624d 02h	/t48/tags/rel_1_1/sw
230	simplify shell command execution	arniml	6627d 00h	/t48/tags/rel_1_1/sw
229	rework hex/simulation targets	arniml	6627d 00h	/t48/tags/rel_1_1/sw
199	initial check-in	arniml	6858d 04h	/t48/tags/rel_1_1/sw
194	initial check-in	arniml	6859d 15h	/t48/tags/rel_1_1/sw
185	initial check-in	arniml	6913d 04h	/t48/tags/rel_1_1/sw
184	initial check-in	arniml	6913d 05h	/t48/tags/rel_1_1/sw
173	testcase for bug report "MSB of Program Counter changed upon PC increment"	arniml	7004d 06h	/t48/tags/rel_1_1/sw
141	disable external memory to avoid conflicts with outl a, bus	arniml	7230d 06h	/t48/tags/rel_1_1/sw
132	stop simulation upon assertion error	arniml	7274d 01h	/t48/tags/rel_1_1/sw
131	update	arniml	7274d 01h	/t48/tags/rel_1_1/sw