URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_1/] [sw] - Rev 74

Rev	Log message	Author	Age	Path
74	enhance pass/fail detection	arniml	7449d 02h	/t48/tags/rel_1_1/sw
70	clean test cell before make	arniml	7454d 18h	/t48/tags/rel_1_1/sw
69	fix name of istrobe	arniml	7454d 18h	/t48/tags/rel_1_1/sw
61	expand script for dump compare	arniml	7456d 15h	/t48/tags/rel_1_1/sw
58	add periodic interrupt	arniml	7457d 15h	/t48/tags/rel_1_1/sw
57	abort if no interrupt occurs	arniml	7457d 15h	/t48/tags/rel_1_1/sw
52	+ fix bug in PSW[3] + read SP properly for dump	arniml	7458d 17h	/t48/tags/rel_1_1/sw
51	+ implement Port1 and Port2 + connect T0 and T1 + return proper program memory contents	arniml	7458d 17h	/t48/tags/rel_1_1/sw
49	Imported sources	arniml	7463d 18h	/t48/tags/rel_1_1/sw
48	update copyright notice	arniml	7463d 18h	/t48/tags/rel_1_1/sw
47	initial check-in	arniml	7463d 18h	/t48/tags/rel_1_1/sw
46	fix test	arniml	7465d 15h	/t48/tags/rel_1_1/sw
42	change test values that match better to the test case	arniml	7466d 19h	/t48/tags/rel_1_1/sw
41	expand PATH	arniml	7466d 19h	/t48/tags/rel_1_1/sw
39	initial check-in	arniml	7468d 23h	/t48/tags/rel_1_1/sw
36	make calculation of expected value more readable	arniml	7469d 00h	/t48/tags/rel_1_1/sw
35	initial check-in	arniml	7471d 17h	/t48/tags/rel_1_1/sw
34	fix test wrt AC	arniml	7474d 17h	/t48/tags/rel_1_1/sw
25	initial check-in	arniml	7475d 16h	/t48/tags/rel_1_1/sw
18	fix constant format	arniml	7477d 15h	/t48/tags/rel_1_1/sw