OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_1] - Rev 37

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
37 add dump_compare support arniml 7405d 08h /t48/tags/rel_1_1
36 make calculation of expected value more readable arniml 7405d 08h /t48/tags/rel_1_1
35 initial check-in arniml 7408d 01h /t48/tags/rel_1_1
34 fix test wrt AC arniml 7411d 02h /t48/tags/rel_1_1
33 rename pX_limp to pX_low_imp arniml 7411d 02h /t48/tags/rel_1_1
32 rename pX_limp to pX_low_imp arniml 7411d 02h /t48/tags/rel_1_1
31 refer PROJECT_DIR variable arniml 7411d 02h /t48/tags/rel_1_1
30 connect prog_n_o arniml 7412d 00h /t48/tags/rel_1_1
29 take auxiliary carry from direct ALU connection arniml 7412d 00h /t48/tags/rel_1_1
28 update wiring for DA support arniml 7412d 00h /t48/tags/rel_1_1
27 implemented mnemonic DA arniml 7412d 01h /t48/tags/rel_1_1
26 support for DA instruction arniml 7412d 01h /t48/tags/rel_1_1
25 initial check-in arniml 7412d 01h /t48/tags/rel_1_1
24 connect control signal for Port 2 expander arniml 7412d 09h /t48/tags/rel_1_1
23 rework Port 2 expander handling arniml 7412d 09h /t48/tags/rel_1_1
22 merge MN_ANLD, MN_MOVD_PP_A and MN_ORLD_PP_A to OUTLD_PP_A arniml 7412d 09h /t48/tags/rel_1_1
21 implement mnemonics:
+ MOVD_A_PP
+ OUTD_PP_A -> ANLD PP, A; MOVD PP, A; ORLD PP, A
arniml 7412d 09h /t48/tags/rel_1_1
20 move code for PROG out of if-branch for xtal3_s arniml 7412d 09h /t48/tags/rel_1_1
19 enhance simulation result string arniml 7413d 23h /t48/tags/rel_1_1
18 fix constant format arniml 7413d 23h /t48/tags/rel_1_1

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.