URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_1] - Rev 97

Rev	Log message	Author	Age	Path
97	initial check-in	arniml	7363d 19h	/t48/tags/rel_1_1
96	select dedicated directorie(s) for regression	arniml	7364d 16h	/t48/tags/rel_1_1
95	check counter inactivity	arniml	7364d 16h	/t48/tags/rel_1_1
94	initial check-in	arniml	7364d 16h	/t48/tags/rel_1_1
93	add support for line coverage evaluation with gcov	arniml	7364d 17h	/t48/tags/rel_1_1
92	work around bug in Quartus II 4.0	arniml	7364d 17h	/t48/tags/rel_1_1
91	fix edge detector bug for counter	arniml	7364d 17h	/t48/tags/rel_1_1
90	intial check-in	arniml	7364d 17h	/t48/tags/rel_1_1
89	initial check-in	arniml	7378d 13h	/t48/tags/rel_1_1
88	allow memory bank switching during interrupts	arniml	7379d 15h	/t48/tags/rel_1_1
87	abort gracfullt if memory bank switching does not work	arniml	7379d 15h	/t48/tags/rel_1_1
86	update notice about expander port instructions	arniml	7379d 21h	/t48/tags/rel_1_1
85	initial check-in	arniml	7379d 21h	/t48/tags/rel_1_1
84	add if_timing module	arniml	7385d 12h	/t48/tags/rel_1_1
83	connect if_timing to P2 output of T48	arniml	7385d 12h	/t48/tags/rel_1_1
82	check expander timings	arniml	7385d 12h	/t48/tags/rel_1_1
81	initial check-in	arniml	7385d 16h	/t48/tags/rel_1_1
80	added if_timing	arniml	7385d 16h	/t48/tags/rel_1_1
79	add if_timing module	arniml	7385d 16h	/t48/tags/rel_1_1
78	adjust external timing of BUS	arniml	7385d 16h	/t48/tags/rel_1_1