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[/] [t48/] [tags/] [rel_1_4/] [rtl/] [vhdl/] [clock_ctrl.vhd] - Rev 344

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Rev Log message Author Age Path
344 release 1.4 arniml 557d 15h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
295 - remove unsupported CVS tags
- propset for Id		 arniml 5606d 14h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
292 New directory structure. root 5628d 23h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
249 Fix bug report
"Deassertion of PROG too early"
PROG is deasserted at end of XTAL3 now		 arniml 6599d 08h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
219 new input xtal_en_i gates xtal_i base clock arniml 6623d 09h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
203 * shift assertion of ALE and PROG to xtal3
* correct change of revision 1.8		 arniml 6853d 12h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
179 introduce prefix 't48_' for all packages, entities and configurations arniml 6996d 23h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
176 Use en_clk_i instead of xtal3_s for generation of external signals.
This is required when the core runs with full xtal clock instead
of xtal/3 (xtal_div_3_g = 0).		 arniml 6998d 11h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
162 Fix bug report:
"Wrong clock applied to T0"
t0_o is generated inside clock_ctrl with a separate flip-flop running
with xtal_i		 arniml 7034d 13h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
145 remove PROG and end of XTAL2, see comment for details arniml 7225d 13h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
142 deassert rd_q, wr_q and prog_q at end of XTAL3 arniml 7225d 14h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
77 move from std_logic_arith to numeric_std arniml 7409d 09h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
63 reset machine state to MSTATE3 to allow proper instruction fetch
after reset		 arniml 7415d 14h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
20 move code for PROG out of if-branch for xtal3_s arniml 7436d 20h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd
4 initial check-in arniml 7441d 12h /t48/tags/rel_1_4/rtl/vhdl/clock_ctrl.vhd

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