OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_4] - Rev 173

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
173 testcase for bug report
"MSB of Program Counter changed upon PC increment"		 arniml 6975d 15h /t48/tags/rel_1_4
172 save data from wishbone bus in register bank with wb_ack
necessary to hold data from peripheral/memory until it is read by T48		 arniml 7004d 11h /t48/tags/rel_1_4
171 remove obsolete output stack_high_o arniml 7005d 12h /t48/tags/rel_1_4
170 intermediate update arniml 7006d 18h /t48/tags/rel_1_4
169 initial check-in arniml 7006d 23h /t48/tags/rel_1_4
168 change address range of wb_master arniml 7006d 23h /t48/tags/rel_1_4
167 simplify address range:
- configuration range
- Wishbone range		 arniml 7006d 23h /t48/tags/rel_1_4
166 assign default for state_s arniml 7008d 15h /t48/tags/rel_1_4
165 add component wb_master.vhd arniml 7009d 14h /t48/tags/rel_1_4
164 initial check-in arniml 7009d 14h /t48/tags/rel_1_4
163 add bug
Wrong clock applied to T0		 arniml 7010d 14h /t48/tags/rel_1_4
162 Fix bug report:
"Wrong clock applied to T0"
t0_o is generated inside clock_ctrl with a separate flip-flop running
with xtal_i		 arniml 7010d 14h /t48/tags/rel_1_4
161 fix syntax problem that triggers an error with GHDL 0.18 arniml 7041d 18h /t48/tags/rel_1_4
160 add others to case statement arniml 7162d 14h /t48/tags/rel_1_4
159 fix dependencies for tb_t8048_behav_c0 and tb_t8039_behav_c0 arniml 7162d 14h /t48/tags/rel_1_4
158 added hierarchies t8039_notri and t8048_notri arniml 7162d 14h /t48/tags/rel_1_4
157 removed obsolete constant arniml 7162d 14h /t48/tags/rel_1_4
156 added hierarchy t8039_notri arniml 7162d 14h /t48/tags/rel_1_4
155 initial check-in arniml 7162d 14h /t48/tags/rel_1_4
154 added t8039_notri hierarchy arniml 7162d 14h /t48/tags/rel_1_4

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.