URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_4] - Rev 292

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5668d 05h	/t48/tags/rel_1_4
291	remove t48_opc_decoder component reference	arniml	5979d 18h	/tags/rel_1_4
290	remove obsolete components	arniml	5980d 20h	/tags/rel_1_4
288	updates for release 1.1	arniml	5981d 17h	/tags/rel_1_4
287	add notes on FPGA implementation	arniml	5981d 17h	/tags/rel_1_4
286	hierarchy update, RAM and ROM clarification	arniml	5981d 17h	/tags/rel_1_4
285	generate D for synchronous implementation in clocked process	arniml	5982d 18h	/tags/rel_1_4
284	better support for ISE/XST: opc_table and opc_decoder merged into decoder_pack and decoder	arniml	5982d 18h	/tags/rel_1_4
283	update to new mnemonic decoder	arniml	5982d 18h	/tags/rel_1_4
282	decouple bidir port T0 from P1 fixes testcase black_box/tx/t0	arniml	5983d 17h	/tags/rel_1_4
281	clarify testcase compilation	arniml	5983d 17h	/tags/rel_1_4
280	added syn directory structure	arniml	5984d 17h	/tags/rel_1_4
279	update	arniml	5999d 15h	/tags/rel_1_4
278	initial check-in	arniml	5999d 18h	/tags/rel_1_4
276	add change notes for release 1.0	arniml	6480d 16h	/tags/rel_1_4
275	fix sensitivity list	arniml	6481d 14h	/tags/rel_1_4
274	revision 1.0	arniml	6481d 14h	/tags/rel_1_4
273	reset counter_q	arniml	6499d 01h	/tags/rel_1_4
272	fix entity port names	arniml	6503d 02h	/tags/rel_1_4
271	initial check-in	arniml	6503d 02h	/tags/rel_1_4