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[/] [t48/] [tags/] [rel_1_4] - Rev 40

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40 rework adder and force resource sharing between ADD, INC and DEC arniml 7404d 00h /t48/tags/rel_1_4
39 initial check-in arniml 7406d 04h /t48/tags/rel_1_4
38 add measures to implement XCHD arniml 7406d 04h /t48/tags/rel_1_4
37 add dump_compare support arniml 7406d 04h /t48/tags/rel_1_4
36 make calculation of expected value more readable arniml 7406d 05h /t48/tags/rel_1_4
35 initial check-in arniml 7408d 22h /t48/tags/rel_1_4
34 fix test wrt AC arniml 7411d 23h /t48/tags/rel_1_4
33 rename pX_limp to pX_low_imp arniml 7411d 23h /t48/tags/rel_1_4
32 rename pX_limp to pX_low_imp arniml 7411d 23h /t48/tags/rel_1_4
31 refer PROJECT_DIR variable arniml 7411d 23h /t48/tags/rel_1_4
30 connect prog_n_o arniml 7412d 21h /t48/tags/rel_1_4
29 take auxiliary carry from direct ALU connection arniml 7412d 21h /t48/tags/rel_1_4
28 update wiring for DA support arniml 7412d 21h /t48/tags/rel_1_4
27 implemented mnemonic DA arniml 7412d 21h /t48/tags/rel_1_4
26 support for DA instruction arniml 7412d 22h /t48/tags/rel_1_4
25 initial check-in arniml 7412d 22h /t48/tags/rel_1_4
24 connect control signal for Port 2 expander arniml 7413d 05h /t48/tags/rel_1_4
23 rework Port 2 expander handling arniml 7413d 05h /t48/tags/rel_1_4
22 merge MN_ANLD, MN_MOVD_PP_A and MN_ORLD_PP_A to OUTLD_PP_A arniml 7413d 05h /t48/tags/rel_1_4
21 implement mnemonics:
+ MOVD_A_PP
+ OUTD_PP_A -> ANLD PP, A; MOVD PP, A; ORLD PP, A
arniml 7413d 06h /t48/tags/rel_1_4

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