URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [video.v] - Rev 246

Rev	Log message	Author	Age	Path
246	Added some older files plus the first syn script	creep	5470d 20h	/t6507lp/trunk/rtl/verilog/video.v
238	ALU file is linted.	creep	5516d 15h	/t6507lp/trunk/rtl/verilog/video.v
237	Added a preliminary collision detection logic.	creep	5517d 17h	/t6507lp/trunk/rtl/verilog/video.v
235	Bug #60: added a brief simulation to the video_converter module.	creep	5518d 13h	/t6507lp/trunk/rtl/verilog/video.v
222	Added a simple line-by-line tester.	creep	5526d 16h	/t6507lp/trunk/rtl/verilog/video.v
221	Added a VGA controller.	creep	5526d 20h	/t6507lp/trunk/rtl/verilog/video.v
218	Added the video converter.	creep	5530d 13h	/t6507lp/trunk/rtl/verilog/video.v
217	All write operations at the TIA are coded.	creep	5531d 19h	/t6507lp/trunk/rtl/verilog/video.v
216	Register bank at TIA properly set. Working on the R/W instructions.	creep	5532d 15h	/t6507lp/trunk/rtl/verilog/video.v
215	Adding the video module.	creep	5533d 16h	/t6507lp/trunk/rtl/verilog/video.v