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[/] [test_project/] [trunk/] [rtl/] [verilog/] [components/] [or1k_startup/] [spi_flash_top.v] - Rev 42

Rev	Log message	Author	Age	Path
42	Fixed up to allow compilation with verilator. Mostly separation of modules into appropriate file names. However some vector declaration changes in the smii module has definitely broken it.	julius	5832d 20h	/test_project/trunk/rtl/verilog/components/or1k_startup/spi_flash_top.v
22	compiles with icarus. basic make script done	julius	5839d 06h	/test_project/trunk/rtl/verilog/components/or1k_startup/spi_top.v
19	the rest of the design	unneback	5840d 05h	/test_project/trunk/rtl/verilog/components/or1k_startup/spi_top.v