Rev |
Log message |
Author |
Age |
Path |
39 |
A lot of work in the assembler. It now supports nearly every opcode implemented and is a lot cleaner
Added a bootrom. There isn't really a point in testbenching this.. I'm not for sure how I would, and it will change so much in these early days that it'll be pointless I think
Everything should be ready to go for a test on actual hardware now! |
earlz |
4422d 22h |
/tinycpu/trunk/docs/design.md.txt |
34 |
Implemented load and store instructions (`mov reg, [reg]` and `mov [reg], reg` respectively) |
earlz |
4426d 00h |
/tinycpu/trunk/docs/design.md.txt |
33 |
Added more test cases for push/pop. More are still needed though
Fixed SP increment/decrementing
Added new opcode `mov reg,reg` so debugging isn't such a pain |
earlz |
4426d 03h |
/tinycpu/trunk/docs/design.md.txt |
30 |
After a long weekend of thinking how to do this.. I've decided instead to not strive for a single-cycle computer.
Now, instead, ALU operations will be 2 cycle along with memory operations, and data movement operations are still 1 cycle |
earlz |
4427d 00h |
/tinycpu/trunk/docs/design.md.txt |
29 |
Well, added a testcase for testing the ALU bitwise operations and found a very large problem.
I'm pretty sure that the decoder needs to be partially unclocked because it essentially makes the ALU clocked how it is now, which is very bad. |
earlz |
4430d 07h |
/tinycpu/trunk/docs/design.md.txt |
27 |
Added a few ALU opcodes and came across a weird propogation delay issue with my registerfile.
As a workaround, I'm trying to use falling_edge instead of rising_edge. We shall see if I regret this later |
earlz |
4431d 08h |
/tinycpu/trunk/docs/design.md.txt |
25 |
Wait for memory state now works as expected, and opcode `mov [reg], immd` works now |
earlz |
4431d 13h |
/tinycpu/trunk/docs/design.md.txt |
21 |
The core_tb testbench finally passes. It probably doesn't synthesize, or even pass other testbenches, but it passes that one damn it. |
earlz |
4432d 23h |
/tinycpu/trunk/docs/design.md.txt |
19 |
Got beginning of core/decoder for the CPU |
earlz |
4434d 00h |
/tinycpu/trunk/docs/design.md.txt |
17 |
Added fetch component for fetching from memory to instruction register
Added additional testing for carryover to make sure it's correct |
earlz |
4437d 23h |
/tinycpu/trunk/docs/design.md.txt |
16 |
Renamed incdec to carryover (see design for why).
carryover should be done, though may change the "straight through on disable" behavior to instead leaving it floating depending on how things go later with coding. |
earlz |
4441d 02h |
/tinycpu/trunk/docs/design.md.txt |
14 |
Added ALU with all the operations we'll need. Synthesizes as well trivially |
earlz |
4443d 07h |
/tinycpu/trunk/docs/design.md.txt |
5 |
Modified registerfile to be dual-port for both read and write |
earlz |
4449d 00h |
/tinycpu/trunk/docs/design.md.txt |
4 |
Added internal memory interface
Updated design |
earlz |
4449d 08h |
/tinycpu/trunk/docs/design.md.txt |
3 |
Updated registerfile to have 2 read ports
Added super rough design document mainly just for brainstorming |
earlz |
4450d 00h |
/tinycpu/trunk/docs/design.md.txt |