URL https://opencores.org/ocsvn/tinycpu/tinycpu/trunk

Subversion Repositories tinycpu

[/] [tinycpu/] [trunk/] [docs/] [design.md.txt] - Rev 25

Rev	Log message	Author	Age	Path
25	Wait for memory state now works as expected, and opcode `mov [reg], immd` works now	earlz	4390d 02h	/tinycpu/trunk/docs/design.md.txt
21	The core_tb testbench finally passes. It probably doesn't synthesize, or even pass other testbenches, but it passes that one damn it.	earlz	4391d 12h	/tinycpu/trunk/docs/design.md.txt
19	Got beginning of core/decoder for the CPU	earlz	4392d 13h	/tinycpu/trunk/docs/design.md.txt
17	Added fetch component for fetching from memory to instruction register Added additional testing for carryover to make sure it's correct	earlz	4396d 12h	/tinycpu/trunk/docs/design.md.txt
16	Renamed incdec to carryover (see design for why). carryover should be done, though may change the "straight through on disable" behavior to instead leaving it floating depending on how things go later with coding.	earlz	4399d 15h	/tinycpu/trunk/docs/design.md.txt
14	Added ALU with all the operations we'll need. Synthesizes as well trivially	earlz	4401d 20h	/tinycpu/trunk/docs/design.md.txt
5	Modified registerfile to be dual-port for both read and write	earlz	4407d 13h	/tinycpu/trunk/docs/design.md.txt
4	Added internal memory interface Updated design	earlz	4407d 21h	/tinycpu/trunk/docs/design.md.txt
3	Updated registerfile to have 2 read ports Added super rough design document mainly just for brainstorming	earlz	4408d 13h	/tinycpu/trunk/docs/design.md.txt