URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk/] [rtl/] [core/] [tv80_core.v] - Rev 103

Rev	Log message	Author	Age	Path
100	Changed do to dout in tv80n, checked in fix for flags bug	ghutchis	4907d 16h	/tv80/trunk/rtl/core/tv80_core.v
90	Fixed syntax errors in core preventing Verilator from compiling. Added new capability to register generator to make registers which latch on an external event. Removed spurious copyright notice.	ghutchis	5323d 13h	/tv80/trunk/rtl/core/tv80_core.v
89	RTL and environment fixes for nmi bug	ghutchis	5343d 16h	/tv80/trunk/rtl/core/tv80_core.v
88	Fixed bug introduced by conversion of mcycle to one-hot FSM	ghutchis	5345d 07h	/tv80/trunk/rtl/core/tv80_core.v
87	Added additional ifdef signals to remove unneede R (refresh) register	ghutchis	5360d 14h	/tv80/trunk/rtl/core/tv80_core.v
84	New directory structure.	root	5584d 02h	/tv80/trunk/rtl/core/tv80_core.v
60	Added ifdef TV80_REFRESH, to remove refresh logic by default. Also ran untabify to remove tabs from source code.	ghutchis	7087d 17h	/tv80/trunk/rtl/core/tv80_core.v
24	tv80s.v	ghutchis	7201d 04h	/tv80/trunk/rtl/core/tv80_core.v
22	Changed starting state for one-hot tstate	ghutchis	7213d 18h	/tv80/trunk/rtl/core/tv80_core.v
21	Replaced encoded states with one-hot	ghutchis	7214d 19h	/tv80/trunk/rtl/core/tv80_core.v
2	Initial commit	ghutchis	7342d 19h	/tv80/trunk/rtl/core/tv80_core.v