OpenCores
URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk/] [rtl/] [core/] [tv80_mcode.v] - Rev 90

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
90 Fixed syntax errors in core preventing Verilator from compiling.
Added new capability to register generator to make registers which
latch on an external event. Removed spurious copyright notice.
ghutchis 5642d 21h /tv80/trunk/rtl/core/tv80_mcode.v
84 New directory structure. root 5903d 10h /tv80/trunk/rtl/core/tv80_mcode.v
83 Some fixes from Guy-- replace case with casex. hharte 5976d 16h /tv80/trunk/rtl/core/tv80_mcode.v
80 Misc. code clean-up on mcode to make code smaller and (hopefully)
more readable.
ghutchis 7086d 01h /tv80/trunk/rtl/core/tv80_mcode.v
33 Added missing IncDec controls to OUTI/OUTD instructions ghutchis 7491d 20h /tv80/trunk/rtl/core/tv80_mcode.v
24 tv80s.v ghutchis 7520d 12h /tv80/trunk/rtl/core/tv80_mcode.v
23 Completed conversion to one-hot encoding ghutchis 7533d 02h /tv80/trunk/rtl/core/tv80_mcode.v
21 Replaced encoded states with one-hot ghutchis 7534d 02h /tv80/trunk/rtl/core/tv80_mcode.v
2 Initial commit ghutchis 7662d 02h /tv80/trunk/rtl/core/tv80_mcode.v

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.