OpenCores
URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [baud_generator.vhd] - Rev 32

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
32 Change baud generator to create a overclock frequency of 8x the baud rate....
Change the serial receiver to sample the signal on the middle of the serial input, now it's using only the overclocked baud...
leonardoaraujo.santos 4497d 20h /uart_block/trunk/hdl/iseProject/baud_generator.vhd
16 Adding testbench for wishbone slave module leonardoaraujo.santos 4500d 19h /uart_block/trunk/hdl/iseProject/baud_generator.vhd
15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 4500d 20h /uart_block/trunk/hdl/iseProject/baud_generator.vhd
14 Fixing some warnings... Adding wishbone slave leonardoaraujo.santos 4501d 16h /uart_block/trunk/hdl/iseProject/baud_generator.vhd
12 Working on the communication blocks leonardoaraujo.santos 4501d 18h /uart_block/trunk/hdl/iseProject/baud_generator.vhd
11 Adding uart_communication_block leonardoaraujo.santos 4501d 20h /uart_block/trunk/hdl/iseProject/baud_generator.vhd
8 Solving some bugs in baud_generator.vhd leonardoaraujo.santos 4502d 22h /uart_block/trunk/hdl/iseProject/baud_generator.vhd
6 Adding baud generator leonardoaraujo.santos 4503d 19h /uart_block/trunk/hdl/iseProject/baud_generator.vhd

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.