URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [divisor.vhd] - Rev 36

Rev	Log message	Author	Age	Path
36	Working on the documentation	leonardoaraujo.santos	4412d 19h	/uart_block/trunk/hdl/iseProject/divisor.vhd
15	Taking out some warnings and transparent latches from the design	leonardoaraujo.santos	4420d 03h	/uart_block/trunk/hdl/iseProject/divisor.vhd
14	Fixing some warnings... Adding wishbone slave	leonardoaraujo.santos	4420d 23h	/uart_block/trunk/hdl/iseProject/divisor.vhd
9	Adding Control unit for uart block	leonardoaraujo.santos	4421d 19h	/uart_block/trunk/hdl/iseProject/divisor.vhd
5	Adding sequential division (32 cycles per 32 bit word)	leonardoaraujo.santos	4428d 04h	/uart_block/trunk/hdl/iseProject/divisor.vhd