URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [testDivisor.vhd] - Rev 38

Rev	Log message	Author	Age	Path
38	Adding testbench validation .... We could still have some problem on the data_ready of serial_receiver block	leonardoaraujo.santos	4562d 15h	/uart_block/trunk/hdl/iseProject/testDivisor.vhd
37	Working on the documentation	leonardoaraujo.santos	4563d 16h	/uart_block/trunk/hdl/iseProject/testDivisor.vhd
36	Working on the documentation	leonardoaraujo.santos	4563d 17h	/uart_block/trunk/hdl/iseProject/testDivisor.vhd
15	Taking out some warnings and transparent latches from the design	leonardoaraujo.santos	4571d 01h	/uart_block/trunk/hdl/iseProject/testDivisor.vhd
6	Adding baud generator	leonardoaraujo.santos	4574d 00h	/uart_block/trunk/hdl/iseProject/testDivisor.vhd
5	Adding sequential division (32 cycles per 32 bit word)	leonardoaraujo.santos	4579d 01h	/uart_block/trunk/hdl/iseProject/testDivisor.vhd