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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [testUart_wishbone_slave.vhd] - Rev 37

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Rev	Log message	Author	Age	Path
37	Working on the documentation	leonardoaraujo.santos	4411d 14h	/uart_block/trunk/hdl/iseProject/testUart_wishbone_slave.vhd
36	Working on the documentation	leonardoaraujo.santos	4411d 15h	/uart_block/trunk/hdl/iseProject/testUart_wishbone_slave.vhd
24	Working on testbench and refactoring... now we could start some tests on the board...	leonardoaraujo.santos	4417d 19h	/uart_block/trunk/hdl/iseProject/testUart_wishbone_slave.vhd
23	Working on uart_control refactoring	leonardoaraujo.santos	4417d 20h	/uart_block/trunk/hdl/iseProject/testUart_wishbone_slave.vhd
21	Preparing to rewrite uart_control, adding pin to indicate data available at the RX	leonardoaraujo.santos	4418d 06h	/uart_block/trunk/hdl/iseProject/testUart_wishbone_slave.vhd
20	Finishing at least the tests on testbench.... Was good to verify that the uart_control should be redesigned to allow concurrent receive and to clean the code...	leonardoaraujo.santos	4418d 13h	/uart_block/trunk/hdl/iseProject/testUart_wishbone_slave.vhd
19	Working on the top wishbone slave testbench.... still need some fixes (Both on the testbench and on the uart_control.vhd)	leonardoaraujo.santos	4418d 14h	/uart_block/trunk/hdl/iseProject/testUart_wishbone_slave.vhd
18	sdsd	leonardoaraujo.santos	4418d 21h	/uart_block/trunk/hdl/iseProject/testUart_wishbone_slave.vhd
17	Working on slave testbench and fixing some bugs	leonardoaraujo.santos	4418d 22h	/uart_block/trunk/hdl/iseProject/testUart_wishbone_slave.vhd
16	Adding testbench for wishbone slave module	leonardoaraujo.santos	4418d 22h	/uart_block/trunk/hdl/iseProject/testUart_wishbone_slave.vhd

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