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[/] [uart_block/] [trunk/] [hdl] - Rev 32

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32 Change baud generator to create a overclock frequency of 8x the baud rate....
Change the serial receiver to sample the signal on the middle of the serial input, now it's using only the overclocked baud...		 leonardoaraujo.santos 4548d 04h /uart_block/trunk/hdl
31 Working on documentation and on Chipscope leonardoaraujo.santos 4548d 16h /uart_block/trunk/hdl
30 Preparing to work with chipscope leonardoaraujo.santos 4548d 16h /uart_block/trunk/hdl
29 Preparing to work with chipscope leonardoaraujo.santos 4548d 17h /uart_block/trunk/hdl
28 Changing wrong datasheet of Spartan3A kit for newer one.... Detected some bug on the reception (When is fast it seems that the reception could be wrong...) leonardoaraujo.santos 4548d 18h /uart_block/trunk/hdl
27 First version seems working nice on the PC!!! leonardoaraujo.santos 4548d 19h /uart_block/trunk/hdl
25 Adding some sample code on the doc folder, also adding the wishbone public domain library file leonardoaraujo.santos 4549d 02h /uart_block/trunk/hdl
24 Working on testbench and refactoring... now we could start some tests on the board... leonardoaraujo.santos 4550d 00h /uart_block/trunk/hdl
23 Working on uart_control refactoring leonardoaraujo.santos 4550d 01h /uart_block/trunk/hdl
22 Refactoring the uart_control leonardoaraujo.santos 4550d 04h /uart_block/trunk/hdl
21 Preparing to rewrite uart_control, adding pin to indicate data available at the RX leonardoaraujo.santos 4550d 10h /uart_block/trunk/hdl
20 Finishing at least the tests on testbench.... Was good to verify that the uart_control should be redesigned to allow concurrent receive and to clean the code... leonardoaraujo.santos 4550d 18h /uart_block/trunk/hdl
19 Working on the top wishbone slave testbench.... still need some fixes (Both on the testbench and on the uart_control.vhd) leonardoaraujo.santos 4550d 19h /uart_block/trunk/hdl
18 sdsd leonardoaraujo.santos 4551d 01h /uart_block/trunk/hdl
17 Working on slave testbench and fixing some bugs leonardoaraujo.santos 4551d 03h /uart_block/trunk/hdl
16 Adding testbench for wishbone slave module leonardoaraujo.santos 4551d 03h /uart_block/trunk/hdl
15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 4551d 04h /uart_block/trunk/hdl
14 Fixing some warnings... Adding wishbone slave leonardoaraujo.santos 4552d 00h /uart_block/trunk/hdl
13 Working on uart_control testbench... also applying some fixes... leonardoaraujo.santos 4552d 01h /uart_block/trunk/hdl
12 Working on the communication blocks leonardoaraujo.santos 4552d 02h /uart_block/trunk/hdl

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