URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [logic.v] - Rev 46

Rev	Log message	Author	Age	Path
46	updated parity	unneback	5168d 15h	/versatile_library/trunk/rtl/verilog/logic.v
44	added target independet IO functionns	unneback	5173d 09h	/versatile_library/trunk/rtl/verilog/logic.v
43	added logic for parity generation and check	unneback	5177d 12h	/versatile_library/trunk/rtl/verilog/logic.v
42	updated mux_andor	unneback	5181d 12h	/versatile_library/trunk/rtl/verilog/logic.v
40	new build environment with custom.v added as a result file	unneback	5181d 14h	/versatile_library/trunk/rtl/verilog/logic.v
38	updated andor mux	unneback	5182d 11h	/versatile_library/trunk/rtl/verilog/logic.v
36	added generic andor_mux	unneback	5189d 16h	/versatile_library/trunk/rtl/verilog/logic.v
35	added vl_mux2_andor and vl_mux3_andor localparam	unneback	5190d 03h	/versatile_library/trunk/rtl/verilog/logic.v
34	added vl_mux2_andor and vl_mux3_andor	unneback	5190d 03h	/versatile_library/trunk/rtl/verilog/logic.v
32	added vl_pll for ALTERA (cycloneIII)	unneback	5210d 15h	/versatile_library/trunk/rtl/verilog/logic.v