OpenCores
URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog] - Rev 36

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
36 added generic andor_mux unneback 4876d 01h /versatile_library/trunk/rtl/verilog
35 added vl_mux2_andor and vl_mux3_andor localparam unneback 4876d 12h /versatile_library/trunk/rtl/verilog
34 added vl_mux2_andor and vl_mux3_andor unneback 4876d 12h /versatile_library/trunk/rtl/verilog
33 updated wb3wb3_bridge unneback 4889d 14h /versatile_library/trunk/rtl/verilog
32 added vl_pll for ALTERA (cycloneIII) unneback 4897d 00h /versatile_library/trunk/rtl/verilog
31 sync FIFO updated unneback 4916d 20h /versatile_library/trunk/rtl/verilog
30 updated counter for level1 and level2 function unneback 4916d 20h /versatile_library/trunk/rtl/verilog
29 updated counter for level1 and level2 function unneback 4916d 20h /versatile_library/trunk/rtl/verilog
28 added sync simplex FIFO unneback 4917d 21h /versatile_library/trunk/rtl/verilog
27 added sync simplex FIFO unneback 4917d 21h /versatile_library/trunk/rtl/verilog
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 4917d 23h /versatile_library/trunk/rtl/verilog
25 added sync FIFO unneback 4918d 12h /versatile_library/trunk/rtl/verilog
24 added vl_dff_ce_set unneback 4919d 20h /versatile_library/trunk/rtl/verilog
23 fixed port map error in async fifo 1r1w unneback 4920d 11h /versatile_library/trunk/rtl/verilog
22 added binary counters unneback 4920d 16h /versatile_library/trunk/rtl/verilog
21 reg -> wire in and or mux in logic unneback 4921d 12h /versatile_library/trunk/rtl/verilog
18 naming convention vl_ unneback 4922d 23h /versatile_library/trunk/rtl/verilog
17 unneback 4986d 12h /versatile_library/trunk/rtl/verilog
15 added delay line unneback 4992d 20h /versatile_library/trunk/rtl/verilog
14 reg -> wire for various signals unneback 4993d 01h /versatile_library/trunk/rtl/verilog

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.