OpenCores
URL https://opencores.org/ocsvn/viterbi_decoder_axi4s/viterbi_decoder_axi4s/trunk

Subversion Repositories viterbi_decoder_axi4s

[/] [viterbi_decoder_axi4s/] [trunk/] [testbench/] [tb_dec_viterbi.vhd] - Rev 6

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
6 - adding better axi4s_buffer for better synthesis results
- modifining testbench for more comprehensive testing
- fixing various bugs
mfehrenz 3951d 12h /viterbi_decoder_axi4s/trunk/testbench/tb_dec_viterbi.vhd
5 add: The testbench now has WiFi as a defaut data directory. mfehrenz 4348d 09h /viterbi_decoder_axi4s/trunk/testbench/tb_dec_viterbi.vhd
4 fix: compilation errors in modelsim 10.0a
fix: compilation order is incorrect in perform_simulation.sh

thanks for reporting this bugs.
mfehrenz 4696d 11h /viterbi_decoder_axi4s/trunk/testbench/tb_dec_viterbi.vhd
2 initial version mfehrenz 4713d 08h /viterbi_decoder_axi4s/trunk/testbench/tb_dec_viterbi.vhd

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.