URL https://opencores.org/ocsvn/wb_lpc/wb_lpc/trunk

Subversion Repositories wb_lpc

[/] [wb_lpc/] [trunk/] [rtl/] [verilog/] [wb_lpc_host.v] - Rev 15

Rev	Log message	Author	Age	Path
15	fixed bug: Spec vviolation for multi-byte firmware amcesses: the multi-byte firmware accesses incorrectly follow the multi-byte DMA algorithm and issue a SYNC sequence between each byte transferred. Instead, multi-byte firmware accesses should issue a single SYNC sequence following the transfer of the multi-byte data phase	hharte	5787d 22h	/wb_lpc/trunk/rtl/verilog/wb_lpc_host.v
5	Fix bug in LPC Host that was causing a 2nd LPC cycle because the wishbone cycle was not completely retired when going back to the idle state. Also clean up whitespace.	hharte	5927d 06h	/wb_lpc/trunk/rtl/verilog/wb_lpc_host.v
3	Initial checkin of source files	hharte	5929d 15h	/wb_lpc/trunk/rtl/verilog/wb_lpc_host.v