URL https://opencores.org/ocsvn/wb_lpc/wb_lpc/trunk

Subversion Repositories wb_lpc

[/] [wb_lpc/] [trunk/] [sim/] [wb_lpc_sim/] [wb_lpc_sim.ise] - Rev 20

Rev	Log message	Author	Age	Path
20	New directory structure.	root	5725d 13h	/wb_lpc/trunk/sim/wb_lpc_sim/wb_lpc_sim.ise
17	Fix bugs: 25-Jul-2008 LPC firmware writes must not insert wait-states. 22-Jul-2008 LPC DMA does not report READY+MORE for multi-byte transfers Add feature: 23-Jul-2008 propagate Wishbone errors across LPC interface Improve Testbench: Ability to test multiple wait-states on LPC Peripheral Wishbone Master interface. Check wbs_err_o from LPC Host. Rebuild examples with the fixes above.	hharte	5952d 05h	/wb_lpc/trunk/sim/wb_lpc_sim/wb_lpc_sim.ise
14	Update for Xilinx ISE 10.1	hharte	5956d 20h	/wb_lpc/trunk/sim/wb_lpc_sim/wb_lpc_sim.ise
6	Clean up whitespace.	hharte	6095d 18h	/wb_lpc/trunk/sim/wb_lpc_sim/wb_lpc_sim.ise
3	Initial checkin of source files	hharte	6098d 03h	/wb_lpc/trunk/sim/wb_lpc_sim/wb_lpc_sim.ise