URL https://opencores.org/ocsvn/wbddr3/wbddr3/trunk

Subversion Repositories wbddr3

[/] [wbddr3/] [trunk/] [bench/] [cpp/] [pddrsim.cpp] - Rev 18

Rev	Log message	Author	Age	Path
18	We now pass all tests again--this time for a 4:1 controller, with a CAS of 5 and a CWL of 5. This is designed for a memory running at 320MHz, transmitting across the data lines as 640Mbps, and yet running internally at only 80MHz.	dgisselq	2815d 11h	/wbddr3/trunk/bench/cpp/pddrsim.cpp
16	New, modified code, now works in simulation!!	dgisselq	2843d 15h	/wbddr3/trunk/bench/cpp/pddrsim.cpp