URL https://opencores.org/ocsvn/wbuart32/wbuart32/trunk

Subversion Repositories wbuart32

[/] [wbuart32/] [trunk/] [bench/] [verilog] - Rev 10

Rev	Log message	Author	Age	Path
10	Adjusted for the new hardware flow control capability.	dgisselq	2664d 20h	/wbuart32/trunk/bench/verilog
6	Lots of changes--see the git log for the full details.	dgisselq	2699d 01h	/wbuart32/trunk/bench/verilog
5	Created independent peripheral, several toplevel tests, and updated documentation to match.	dgisselq	2709d 12h	/wbuart32/trunk/bench/verilog
2	A first version to be checked in. The rxuart.v and txuart.v files have been well tested elsewhere, although the test setup here has not been as well tested. Still, type 'make test' in the base directory and you will get an assurance that the entire thing works--if you would like.	dgisselq	2842d 21h	/wbuart32/trunk/bench/verilog