URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] [xge_mac/] [trunk/] [rtl/] [auto_verilog.sh] - Rev 24

Rev	Log message	Author	Age	Path
24	Use FIFO's for statistics clock domain crossing	antanguay	4207d 08h	/xge_mac/trunk/rtl/auto_verilog.sh
23	Adding basic packet stats	antanguay	4207d 14h	/xge_mac/trunk/rtl/auto_verilog.sh
21	Improvements for timing, adding alternate FIFO design using XIL define	antanguay	4209d 11h	/xge_mac/trunk/rtl/auto_verilog.sh
20	Updates for Xilinx synthesis	antanguay	4499d 06h	/xge_mac/trunk/rtl/auto_verilog.sh
7	New directory structure.	root	5563d 22h	/xge_mac/trunk/rtl/auto_verilog.sh
2	Initial revision	antanguay	5846d 10h	/xge_mac/trunk/rtl/auto_verilog.sh