URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] [xge_mac/] [trunk/] [rtl/] [verilog/] [xge_mac.v] - Rev 21

Rev	Log message	Author	Age	Path
20	Updates for Xilinx synthesis	antanguay	4660d 00h	/xge_mac/trunk/rtl/verilog/xge_mac.v
12	Change interface to big endian, added serdes examples to testbench	antanguay	5446d 08h	/xge_mac/trunk/rtl/verilog/xge_mac.v
7	New directory structure.	root	5724d 17h	/xge_mac/trunk/rtl/verilog/xge_mac.v
6	Updated spec. Added mod[2:0] signals. Timing improvements.	antanguay	6001d 01h	/xge_mac/trunk/rtl/verilog/xge_mac.v
2	Initial revision	antanguay	6007d 05h	/xge_mac/trunk/rtl/verilog/xge_mac.v